• DocumentCode
    523031
  • Title

    Power optimal MTCMOS repeater insertion for global buses

  • Author

    Fatemi, H. ; Amelifar, B. ; Pedram, Massoud

  • Author_Institution
    Dept. of EE-Syst., Univ. of Southern California, Los Angeles, CA, USA
  • fYear
    2007
  • fDate
    27-29 Aug. 2007
  • Firstpage
    98
  • Lastpage
    103
  • Abstract
    This paper addresses the problem of power-optimal repeater insertion for global buses in the presence of crosstalk noise. MTCMOS technique by inserting high-Vth sleep transistors to reduce the leakage power consumption in the idle mode is used. We simultaneously calculate the repeater sizes, repeater distances, and the size of the sleep transistors to minimize the power dissipation. The effect of crosstalk coupling capacitance on propagation delay and (switching and short circuit) power dissipation is considered. Experimental results show that depending on the activity factor of the circuit, the proposed technique can significantly reduce the power consumption of the global bus interconnects.
  • Keywords
    CMOS integrated circuits; integrated circuit design; integrated circuit interconnections; integrated circuit noise; MTCMOS repeater insertion; activity factor; crosstalk coupling capacitance; crosstalk noise; global bus interconnects; idle mode; leakage power consumption; power dissipation; propagation delay; sleep transistors; Algorithm design and analysis; Capacitance; Coupling circuits; Crosstalk; Delay; Energy consumption; Integrated circuit interconnections; Power dissipation; Repeaters; Switching circuits; MTCMOS circuits; buffer insertion; low-power design;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Low Power Electronics and Design (ISLPED), 2007 ACM/IEEE International Symposium on
  • Conference_Location
    Portland, OR
  • Electronic_ISBN
    978-1-59593-709-4
  • Type

    conf

  • DOI
    10.1145/1283780.1283802
  • Filename
    5514256