• DocumentCode
    523035
  • Title

    Detailed placement for leakage reduction using systematic through-pitch variation

  • Author

    Kahng, Andrew ; Muddu, S. ; Sharma, Parmanand

  • Author_Institution
    CSE Dept., Univ. of California at San Diego, San Diego, CA, USA
  • fYear
    2007
  • fDate
    27-29 Aug. 2007
  • Firstpage
    110
  • Lastpage
    115
  • Abstract
    We present a novel detailed placement technique that accounts for systematic through-pitch variations to reduce leakage. Leakage depends nearly exponentially on linewidth (gate length), and even small variations in linewidth introduce large variability in leakage. A substantial fraction of linewidth variation is systematic with respect to the device layout context. Detailed placement changes context of the devices that are near the cell boundaries and can be used to reduce leakage. Our approach modifies the placement of cells in small windows such that contexts that reduce leakage are created. During this optimization, cells are partitioned into rows and then placed in rows using a traveling salesman problem formulation.
  • Keywords
    circuit optimisation; integrated circuit layout; leakage currents; travelling salesman problems; detailed placement technique; leakage reduction; systematic through-pitch variation; traveling salesman problem formulation; Delay; Design optimization; Integrated circuit technology; Lithography; Optical scattering; Permission; Routing; Subthreshold current; Temperature; Traveling salesman problems; aCLV; detailed placement; leakage; lithography; through-pitch;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Low Power Electronics and Design (ISLPED), 2007 ACM/IEEE International Symposium on
  • Conference_Location
    Portland, OR
  • Electronic_ISBN
    978-1-59593-709-4
  • Type

    conf

  • DOI
    10.1145/1283780.1283804
  • Filename
    5514260