DocumentCode :
523045
Title :
Clocking structures and power analysis for nanomagnet-based logic devices
Author :
Niemier, Michael T. ; Hu, Xiaobo Sharon ; Alam, M. ; Bernstein, Garrett ; Porod, Wolfgang ; Putney, Michael ; DeAngelis, Jarett
Author_Institution :
Dept. of Comp. Sci. & Eng., Univ. of Notre Dame, Notre Dame, IN, USA
fYear :
2007
fDate :
27-29 Aug. 2007
Firstpage :
26
Lastpage :
31
Abstract :
Logical devices made from nano-scale magnets have many potential advantages - systems should be non-volatile, dense, low power, radiation hard, and could have a natural interface to MRAM. Initial work includes experimental demonstrations of logic gates and wires and theoretical studies that consider their power dissipation. This paper looks at power dissipation too, but also considers the circuitry needed to drive a computation. Initial results are very encouraging and indicate that clocked magnetic logic could - in the worst case - match equivalent low power CMOS circuits and - in the best-case - potentially provide more than 2 orders of magnitude improvement when one considers energy per operation.
Keywords :
CMOS logic circuits; clocks; logic gates; low-power electronics; magnetic logic; nanoelectronics; nanomagnetics; clocked magnetic logic; clocking structure; logic gates; low power CMOS circuit; nano-scale magnet; nanomagnet-based logic device; power analysis; power dissipation; quantum dot cellular automata; CMOS logic circuits; Clocks; Drives; Logic devices; Logic gates; Magnetic analysis; Magnets; Nanoscale devices; Power dissipation; Wires; QCA; clocking; magnetic logic; nanotechnology;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Low Power Electronics and Design (ISLPED), 2007 ACM/IEEE International Symposium on
Conference_Location :
Portland, OR
Electronic_ISBN :
978-1-59593-709-4
Type :
conf
DOI :
10.1145/1283780.1283787
Filename :
5514270
Link To Document :
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