Title :
Power-aware operand delivery
Author :
Gunadi, Erika ; Lipasti, Mikko H.
Author_Institution :
Electr. & Comput. Eng. Dept., Univ. of Wisconsin, Madison, WI, USA
Abstract :
Based on operand delivery, existing microprocessors can be categorized into architected register file (ARF) or physical register file (PRF) machines, both with or without payload RAM (PL). Though many previous generation microprocessors use a PRF without PL, the trend of newer microprocessors targeting lower power environments seem to be moving towards ARF with PL. We quantitatively analyze power consumption of different machine styles: ARF with PL, ARF without PL, PRF with PL, and PRF only machine. Our result shows that PRF without PL consumes the least amount of power and is fundamentally the best approach for building power-aware out-of-order microprocessors.
Keywords :
low-power electronics; microprocessor chips; power aware computing; power consumption; architected register file machine; payload RAM; physical register file machine; power aware operand delivery; power aware out-of-order microprocessors; power consumption; Automatic control; Design methodology; Energy consumption; Microprocessors; Payloads; Physics computing; Portable computers; Power engineering and energy; Read-write memory; Registers; microarchitecture; power; renaming;
Conference_Titel :
Low Power Electronics and Design (ISLPED), 2007 ACM/IEEE International Symposium on
Conference_Location :
Portland, OR
Electronic_ISBN :
978-1-59593-709-4
DOI :
10.1145/1283780.1283862
