Hardware design methodology to synthesize communication interfaces from TLM to RTL

The goal of this paper is to propose a synthesis based design methodology for communication interfaces at transaction level. This methodology can guarantee the synthesizability of high level communications when IP cores each use a different type of communication structure. It also supports changes in design interface in case of IP core changes. The other benefit of the proposed methodology is the ability to manage different kinds of protocols at both sides of the channel. The focus of the paper is on one-to-one communications and other types of communication channels are not discussed in this work.