Challenges in verifying and optimizing fixed-point arithmetic-intensive designs

Arithmetic circuit plays a key role in digital signal processing (DSP). A datapath is used to implement the specification usually represented as a polynomial. The two most important problems are verification and optimization of the arithmetic circuits. Circuit verification confirms whether the implementation can realize the specification with correct behavior or two implementations match well, and optimization generates suitable bit-widths according to constraints. This paper depicts specification of arithmetic circuits, explains the techniques of verification and optimization, and describes current challenges in arithmetic circuit designs.