Test scheduling of SOC IP interconnect for static and SI faults

This paper proposes a scheduling method of SOC (System on Chip) interconnect test complied with IEEE Std 1500 based on Genetic Algorithm. The algorithm figures out optimal scheduling of interconnect test for high utility of TAM (Test Access Mechanism) width, and eight fixed test patterns are used to cover static and Signal Integrity faults based on MA (Maximum Aggressor faults model) for specific victim. Experiment is implemented in ITC´02 benchmark to prove the effectiveness of the algorithm solved with MATLAB toolbox.