DocumentCode
523614
Title
Analyzing k-step induction to compute invariants for SAT-based property checking
Author
Thalmaier, Max ; Nguyen, Minh D. ; Wedler, Markus ; Stoffel, Dominik ; Bormann, Jörg ; Kunz, Wolfgang
Author_Institution
Electron. Design Autom. Group, Univ. of Kaiserslautern, Kaiserslautern, Germany
fYear
2010
fDate
13-18 June 2010
Firstpage
176
Lastpage
181
Abstract
This paper proposes enhancements to SAT-based property checking with the goal to increase the spectrum of applications where a proof of unbounded validity of a safety property can be provided. For this purpose, invariants are computed by reachability analysis on an abstract model. The main idea of the paper consists in a BDD-based analysis of k-step-induction on the abstract model and its use to guide a step-wise refinement process of the initial abstraction. The property is then proven on a bounded model of the original design using the computed invariant. The new approach has been applied to formally verify industrial SoC modules. In our experiments, we consider particularly difficult verification tasks occurring in the context of protocol compliance verification using generic, transaction-style verification IPs. In our experiments, numerous properties are proven which either required substantial manual interaction in previous approaches, or cannot be proven at all by other methods available to us.
Keywords
Boolean functions; Circuits; Data structures; Electronic design automation and methodology; Performance analysis; Protocols; Reachability analysis; Refining; Safety; State-space methods; IPC; Invariants; k-step induction; symbolic traversal;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation Conference (DAC), 2010 47th ACM/IEEE
Conference_Location
Anaheim, CA, USA
ISSN
0738-100X
Print_ISBN
978-1-4244-6677-1
Type
conf
Filename
5522685
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