DocumentCode :
523816
Title :
Trace-driven optimization of networks-on-chip configurations
Author :
Kahng, Andrew B. ; Lin, Bill ; Samadi, Kambiz ; Ramanujam, Rohit Sunkam
Author_Institution :
ECE Dept., Univ. of California San Diego, La Jolla, CA, USA
fYear :
2010
fDate :
13-18 June 2010
Firstpage :
437
Lastpage :
442
Abstract :
Networks-on-chip (NoCs) are becoming increasingly important in general-purpose and application-specific multi-core designs. Although uniform router configurations are appropriate for general-purpose NoCs, router configurations for application-specific NoCs can be non-uniformly optimized to application-specific traffic characteristics. In this paper, we specifically consider the problem of virtual channel (VC) allocation in application-specific NoCs. Prior solutions to this problem have been average-rate driven. However, average-rate models are poor representations of real application traffic, and can lead to designs that are poorly matched to the application. We propose an alternate trace-driven paradigm in which configuration of NoCs is driven by application traces. We propose two simple greedy trace-driven VC allocation schemes. Compared to uniform allocation, we observe up to 51% reduction in the number of VCs under a given average packet latency constraint, or up to 74% reduction in average packet latency with same number of VCs. Our results suggest that average-rate driven methods cannot effectively select appropriate links for VC allocation because they fail to consider the impact of traffic bursts. As a case study, we compare our proposed approach with an existing average-rate driven method and observe up to 35% reduction in the number of VCs for a given target latency.
Keywords :
channel allocation; multiprocessing systems; network routing; network-on-chip; optimisation; application specific multicore designs; greedy trace driven VC allocation schemes; networks-on-chip configurations; packet latency constraint; router configurations; trace driven optimization; virtual channel allocation; Algorithm design and analysis; Computer architecture; Delay; Design optimization; Fabrics; Network-on-a-chip; Permission; Telecommunication traffic; Traffic control; Virtual colonoscopy; Networks-on-Chip; greedy heuristics; virtual channel;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design Automation Conference (DAC), 2010 47th ACM/IEEE
Conference_Location :
Anaheim, CA
ISSN :
0738-100X
Print_ISBN :
978-1-4244-6677-1
Type :
conf
Filename :
5523163
Link To Document :
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