• DocumentCode
    523817
  • Title

    In-situ characterization and extraction of SRAM variability

  • Author

    Chellappa, Srivatsan ; Ni, Jia ; Yao, Xiaoyin ; Hindman, Nathan ; Velamala, Jyothi ; Chen, Min ; Cao, Yu ; Clark, Lawrence T.

  • Author_Institution
    Sch. of Electr., Comput. & Energy Eng., Arizona State Univ., Tempe, AZ, USA
  • fYear
    2010
  • fDate
    13-18 June 2010
  • Firstpage
    711
  • Lastpage
    716
  • Abstract
    Measurement and extraction of as fabricated SRAM cell variability is essential to process improvement and robust design. This is challenging in practice, due to the complexity in the test procedure and requisite numerical analysis. This work proposes a new single-ended test procedure for SRAM cell write margin measurement. Moreover, an efficient decomposition method is developed to extract transistor threshold voltage (VTH) variations from the measurements, allowing accurate determination of SRAM cell stability. The entire approach is demonstrated in a 90 nm test chip with 32 K cells. The advantages of the proposed method include: (1) a single-ended SRAM test structure with no disturbance to SRAM operations; (2) a convenient test procedure that only requires quasi-static control of external voltages; and (3) a non-iterative method that extracts the VTH variation of each transistor from eight measurements. The new procedure enables accurate predictions of SRAM performance variability. As validated with 90 nm data of write margin and data retention voltage, the prediction error from extracted VTH variations is <; 4% at all corners.
  • Keywords
    SRAM chips; circuit testing; computational complexity; numerical analysis; SRAM cell variability; error prediction; in-situ characterization; noniterative method; numerical analysis; quasistatic control; transistor threshold voltage extraction; Circuit testing; Current measurement; Data mining; Fluctuations; Performance analysis; Probes; Production; Random access memory; Semiconductor device measurement; Threshold voltage; Data Retention Voltage; Extraction; SRAM Test; Threshold Voltage Variation; Write Margin;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design Automation Conference (DAC), 2010 47th ACM/IEEE
  • Conference_Location
    Anaheim, CA
  • ISSN
    0738-100X
  • Print_ISBN
    978-1-4244-6677-1
  • Type

    conf

  • Filename
    5523166