DocumentCode
523859
Title
An efficient test vector generation for checking analog/mixed-signal functional models
Author
Lim, Byong Chan ; Kim, Jaeha ; Horowitz, Mark A.
Author_Institution
Stanford Univ., Stanford, CA, USA
fYear
2010
fDate
13-18 June 2010
Firstpage
767
Lastpage
772
Abstract
This paper presents an approach to generate test vectors to characterize analog/mixed-signal circuits and its application to check the correspondence between a circuit and its HDL functional model. Interestingly, the abstract behavior of most analog circuits is a linear system, but sometimes only when viewed through a transformation of variables. When linearity holds, validation for the consistency between a circuit and a model can be efficiently performed with a small set of test vectors that grows linearly with the number of analog inputs. The linear abstraction for analog circuits also helps us distinguish different types of analog and digital I/O ports and verify their consistency effectively. We demonstrate the implemented tool by comparing a simple serial link receiver against its functional model.
Keywords
automatic test pattern generation; mixed analogue-digital integrated circuits; analog circuits; analog functional models; analogcircuits; linear abstraction; linear system; mixed-signal circuits; mixed-signal functional models; serial link receiver; test vector generation; Algorithm design and analysis; Analog circuits; Character generation; Circuit testing; Hardware design languages; Integrated circuit modeling; Linear systems; Linearity; Signal design; Vectors; Equivalence checking; Functional model; Linear abstraction; Mixed-signal circuits; Test vector; Validation; Verilog;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation Conference (DAC), 2010 47th ACM/IEEE
Conference_Location
Anaheim, CA
ISSN
0738-100X
Print_ISBN
978-1-4244-6677-1
Type
conf
Filename
5523251
Link To Document