DocumentCode :
523887
Title :
A holistic approach for statistical SRAM analysis
Author :
Zuber, Paul ; Dobrovolny, Petr ; Miranda, Miguel
Author_Institution :
Digital Components, Imec, Leuven, Belgium
fYear :
2010
fDate :
13-18 June 2010
Firstpage :
717
Lastpage :
722
Abstract :
We present a new method and its implementation that enables design-phase assessment of statistical performance metrics of semiconductor memories under random local and global process variations. Engineers use the tool to reduce design margins and to maximize parametric yield. Results on industry grade 45nm SRAM designs show that this holistic approach is significantly more accurate than the alternatives based on global corners or critical path netlist, which can lead to unexpected yield loss.
Keywords :
SRAM chips; integrated circuit design; integrated circuit yield; statistical analysis; design-phase assessment; semiconductor memories; size 45 nm; statistical SRAM analysis; statistical performance metrics; Analytical models; Circuit simulation; Design engineering; Measurement; Operational amplifiers; Performance analysis; Random access memory; Semiconductor memory; Statistical analysis; Statistical distributions; Statistical SRAM analysis; process variability; yield prediction;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design Automation Conference (DAC), 2010 47th ACM/IEEE
Conference_Location :
Anaheim, CA
ISSN :
0738-100X
Print_ISBN :
978-1-4244-6677-1
Type :
conf
Filename :
5523328
Link To Document :
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