Simultaneous optimization of battery-aware voltage regulator scheduling with dynamic voltage and frequency scaling

Energy-aware task scheduling significantly reduces the total energy required by a system to perform a particular job, by dynamically changing the clock frequency and supply voltage at which the CPU operates. But this causes significant fluctuation of the current drawn from the power source, so that no single voltage regulator can achieve satisfactory efficiency over the entire range of operating currents. We introduce a new method of high-level power management called dynamic voltage regulator scheduling (DRS), which overcomes the fundamental limitation of using a single voltage regulator. In a system equipped with DRS, heterogeneous voltage regulators are connected to a CPU through a multiplexer-type MOSFET switch. As the operating frequency and the supply voltage of the CPU vary, the most efficient voltage regulator is used to supply the power. We first describe a greedy method of achieving DRS, and then we progress to an integer linear programming (ILP) formulation, which simultaneously optimizes DRS together with dynamic voltage and frequency scaling (DVFS). We evaluate the performance of both greedy DRS and optimal DRS. Compared to conventional DVFS, greedy DRS saves an additional 5.4% to 14.6% of the total system energy; and optimal DRS saves an additional 11.5% to 15.5%.