A new approach for testing CMOS circuits for glitches

A method is proposed here for development of a new tool which provides fast and efficient way for fault diagnoses in analog CMOS circuits arises due to glitches. The tool follows SBT (simulation before testing) based approach for tests the CMOS analog circuits against faults arises due to glitches. SBT system for fault diagnosis requires some form of a fault dictionary to which the test data is compared. The designed tool generates a fault dictionary which is used in SBT method with distinct pretest and post-test analysis stages. Pretest analysis generates a fault directory. For this the circuit is simulated circuit under all fault combinations, as well as the fault-free case. We can then compute observable variables (voltages or currents), of them, for each combination and store them in an entry of the fault directory.