Instruction scheduling using genetic algorithm with taboo search for TTA-like processors

Author

Zhong, Songyan ; Wei, Jizeng ; Guo, Wei ; Wang, Zhenghua

Author_Institution

Sch. of Comput. Sci. & Technol., Tianjin Univ., Tianjin, China

Volume

2

fYear

2010

fDate

25-27 June 2010

Abstract

This paper presents an efficient instruction scheduling method for configurable processors based on Transport Triggered Architecture (TTA). The genetic algorithm is used to realize the instruction scheduling while the taboo search is integrated to prevent from getting into the locally optimal solution. Experiment on a serial of DSP applications shows that the proposed method can increase instruction-level parallelism (ILP) about 8.3% than the genetic algorithm alone, and 12.0% than the list scheduling method.

Keywords

genetic algorithms; instruction sets; parallel architectures; processor scheduling; search problems; genetic algorithm; instruction scheduling; instruction-level parallelism; processor scheduling; taboo search; transport triggered architecture; Algorithm design and analysis; Application specific processors; Computer aided instruction; Costs; Genetic algorithms; Job shop scheduling; Processor scheduling; Radio frequency; Registers; Scheduling algorithm; Transport triggered architecture; component; genetic algorithm; instruction scheduling; taboo search;

fLanguage

English

Publisher

ieee

Conference_Titel

Computer Design and Applications (ICCDA), 2010 International Conference on

Conference_Location

Qinhuangdao

Print_ISBN

978-1-4244-7164-5

Electronic_ISBN

978-1-4244-7164-5

Type

conf

DOI

10.1109/ICCDA.2010.5541389

Filename

5541389