DocumentCode :
52592
Title :
On-the-Field Test and Configuration Infrastructure for 2-D-Mesh NoCs in Shared-Memory Many-Core Architectures
Author :
Zhen Zhang ; Refauvelet, Dimitri ; Greiner, Alain ; Benabdenbi, Mounir ; Pecheux, Francois
Author_Institution :
INRIA Rocquencourt, Le Chesnay, France
Volume :
22
Issue :
6
fYear :
2014
fDate :
Jun-14
Firstpage :
1364
Lastpage :
1376
Abstract :
This paper addresses the important issue of fault tolerance in network-on-chip (NoC) and presents an on-the-field test and configuration infrastructure for a 2-D-mesh NoC, which can be used in many generic shared-memory many-core tiled architectures and MPSoCs. This paper also details all the hardware and software means needed to: 1) initialize the NoC in a clean state (self-deactivation of faulty NoC components using a controlled built-in self-test strategy) and 2) set up a distributed collaborative configuration infrastructure that can be used to make the chip autonomously determine, during its initialization, the operational degraded architecture, identify and bypass black holes. Experimental results prove that the approach is effective and lightweight in terms of additional software and hardware resources.
Keywords :
logic design; network-on-chip; shared memory systems; 2D mesh NoC; MPSoC; distributed collaborative configuration infrastructure; network on chip; on the field test; shared memory many core architectures; Built-in self-test; Circuit faults; Computer architecture; Hardware; Routing; Silicon; Topology; Built-in self-test (BIST); fault tolerance; many cores; network-on-chip (NoC); reconfiguration; test; test.;
fLanguage :
English
Journal_Title :
Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
Publisher :
ieee
ISSN :
1063-8210
Type :
jour
DOI :
10.1109/TVLSI.2013.2271697
Filename :
6565420
Link To Document :
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