DocumentCode
526691
Title
The research and design of branch prediction based on multicore heterogeneous
Author
Jin Yu-ping ; Sun Hai-jian ; Ping, Jiao
Author_Institution
Mudanjiang Normal Univ., Mudanjiang, China
Volume
2
fYear
2010
fDate
9-11 July 2010
Firstpage
554
Lastpage
557
Abstract
Aiming at those problem that it was difficult to improve the processor performance only by improving the single core frequency, as well as superscalar pipeline stall when process a branch instruction, the architecture of heterogeneous multi-core processor which used B-Cache structure and C-Core processor controller was introduced in this paper. The new architecture avoided the pipeline flushed due to branch miss-predict, and improve overall efficiency of Multi-Core processor.
Keywords
computer architecture; microprocessor chips; multiprocessing systems; pipeline processing; B-cache structure; C-core processor controller; branch prediction; heterogeneous multicore processor architecture; single core frequency; superscalar pipeline stall; Accuracy; Multicore processing; B-Cache; C-Core; E-Core; Multi-Core;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer Science and Information Technology (ICCSIT), 2010 3rd IEEE International Conference on
Conference_Location
Chengdu
Print_ISBN
978-1-4244-5537-9
Type
conf
DOI
10.1109/ICCSIT.2010.5564921
Filename
5564921
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