DocumentCode
526778
Title
An ultra high-speed 8-bits analog-to-digital converter design
Author
Yu, Jinshan ; Zhang, Ruitao ; Zhang, Zhengping ; Wang, Yonglu ; Can, Zhu ; Zhou, Yu ; Lei, Zhang
Author_Institution
Nat. Labs. of Analog Integrated Circuits, SISC, Chongqing, China
fYear
2010
fDate
13-15 Aug. 2010
Firstpage
448
Lastpage
452
Abstract
In this paper, an ultra high-speed 8-bits analog-to-digital converter with digital foreground calibration in 0.18-μm CMOS technology is presented. The spice simulation and the measured results show the folding and interpolating ADC produces 5.9 ENOB with calibration disabled and 7.2 ENOB with calibration Enabled at Nyquist.
Keywords
CMOS integrated circuits; analogue-digital conversion; integrated circuit design; CMOS technology; ENOB; Nyquist; analog-to-digital converter; digital foreground calibration; size 0.18 mum; Adders; CMOS integrated circuits; CMOS technology; Calibration; Clocks; Converters; Interpolation;
fLanguage
English
Publisher
ieee
Conference_Titel
Intelligent Control and Information Processing (ICICIP), 2010 International Conference on
Conference_Location
Dalian
Print_ISBN
978-1-4244-7047-1
Type
conf
DOI
10.1109/ICICIP.2010.5565223
Filename
5565223
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