DocumentCode :
526786
Title :
Research on signal processing of inductosyn based on FPGA
Author :
Wang, Xianquan ; Wu, Min ; Feng, Jiqin ; Dong, Cun ; Lou, Lina
Author_Institution :
Sch. of Electron. Inf. & Autom., Chongqing Univ. of Technol., Chongqing, China
fYear :
2010
fDate :
13-15 Aug. 2010
Firstpage :
195
Lastpage :
199
Abstract :
In order to improve reliability of Inductosyn signal processing system and save FPGA resources, the article uses a single-chip SOC system design, making the sine/cosine signal power, pulse filling phase detection and data processing integrated into an FPGA, and optimizing the signal circuit of sine / cosine through the technology of point symmetry and axial symmetry. Research on the circuit of pulsed filling phase detection, it be used to detect two singles of the phase difference and the period . Design NIOS and its interface circuits, it can detect the angle of Inductosyn, and amend the angle error with software. Experiments indicated that the designing circuit and signal processing method are correct, only need the table of 0° ~ 90° degrees to respectively generate the 0° ~ 360° sine and cosine signals, save resources of FPGA; At the same time, focus the signal generating, pulse filling phase detection, NIOS microprocessor and display interface on the FPGA, improved the reliability of system.
Keywords :
axial symmetry; field programmable gate arrays; phase detectors; signal processing; system-on-chip; FPGA; SOC system design; axial symmetry; inductosyn; point symmetry; pulse filling phase detection; signal processing; Clocks; Data processing; Field programmable gate arrays; Filling; Phase detection; Radiation detectors; Signal generators;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Intelligent Control and Information Processing (ICICIP), 2010 International Conference on
Conference_Location :
Dalian
Print_ISBN :
978-1-4244-7047-1
Type :
conf
DOI :
10.1109/ICICIP.2010.5565232
Filename :
5565232
Link To Document :
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