A new method for ground telemetry/telecontrol terminal processor design

A new method is proposed for a ground telecontrol/telemetry terminal processor design. The design is based on ATmega1280 + FPGA structure, and data exchange is realized through multiple external interruptions between ATmega1280 and FPGA. It elaborately gives the terminal´s system composition; external RAM R/W, external interrupt, A/D converter, timer and serial interrupt routine design in ATmega1280. FPGA external interrupt management and interface program design with ATmega1280 are also described in detail. Many Experiments have proved that the proposed terminal processor design is not only hardware high performance, but also high reliability and good EMC. It not only well solves the data exchange between the telemetry/telecontrol terminal processor and transmitter, receiver, but also improves the system integration. It can be applied in the similar system, and can also be used for more complicated circumstance for its expandable ability.