• DocumentCode
    5281
  • Title

    Single Event Induced Multiple Bit Errors and the Effects of Logic Masking

  • Author

    Berg, Melanie D. ; Kim, Hak S. ; Phan, Anthony D. ; Seidlick, Christina M. ; LaBel, Kenneth A. ; Pellish, Jonathan A.

  • Author_Institution
    ASRC Fed. Space & Defense, Greenbelt, MD, USA
  • Volume
    60
  • Issue
    6
  • fYear
    2013
  • fDate
    Dec. 2013
  • Firstpage
    4192
  • Lastpage
    4199
  • Abstract
    We apply a model and heavy-ion cross section data to predict the potential that one single event upset (SEU) will induce multiple bit errors (MBEs) by the next clock-cycle of a synchronous design.
  • Keywords
    field programmable gate arrays; radiation effects; FPGA; MBEs; SEU; clock-cycle; field programmable gate array; heavy-ion cross section data; logic masking effect; single event induced multiple bit errors; synchronous design; Error analysis; Field programmable gate arrays; Single event transients; Single event upsets; Field programmable gate array (FPGA); single event transient (SET); single event upset (SEU); synchronous design;
  • fLanguage
    English
  • Journal_Title
    Nuclear Science, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9499
  • Type

    jour

  • DOI
    10.1109/TNS.2013.2290753
  • Filename
    6678090
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=5281