DocumentCode
52846
Title
Time interleaved analog to digital converters: Tutorial 44
Author
Parkey, Charna ; Mikhael, Wasfy
Volume
16
Issue
6
fYear
2013
fDate
Dec-13
Firstpage
42
Lastpage
51
Abstract
This tutorial has addressed the structure and basics of TIADCs, including errors, implementation concerns and possible solutions. While the past few years have shown a sharp increase in patents and industry participation, academic research around the world is still ongoing to improve performance while reducing computational complexity, particularly in the area of nonlinear mismatch correction and scalable correction schemes to handle massively interleaved structures. Reduction in this complexity is critical to reduce the cost of digital logic in post conversion correction structures as well as the power consumption of the overall TIADC system through the use of smaller, simpler post conversion components. TIADCs are currently used in the field for test and measurement as well as communications and other applications.
Keywords
analogue-digital conversion; computational complexity; cost reduction; TIADC system; academic research; computational complexity; cost reduction; digital logic; nonlinear mismatch correction scheme; post conversion correction structure; power consumption; scalable correction scheme; time interleaved analog to digital converter; AC-DC power converters; Converters; Digital converters; Interleaved codes; Tutorials;
fLanguage
English
Journal_Title
Instrumentation & Measurement Magazine, IEEE
Publisher
ieee
ISSN
1094-6969
Type
jour
DOI
10.1109/MIM.2013.6704972
Filename
6704972
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