DocumentCode :
528702
Title :
K-band PLL based frequency synthesizer
Author :
Kashif, Muhammad ; Malik, Zahid Yaqoob ; Yasin, Mubashar ; Nawaz, Muhammad Imran
Author_Institution :
Centre for Wireless Commun. & Radar Technol., NESCOM, Islamabad, Pakistan
fYear :
2009
fDate :
19-22 Jan. 2009
Firstpage :
136
Lastpage :
139
Abstract :
The design and implementation of a K-band (22GHz) PLL frequency synthesizer is described. The frequency source was intended to be used in a test and measurement setup and the design goal was to achieve spurious free signal with lower phase noise and lesser harmonics. The PLL is locked at half of the output frequency; therefore there is frequency doubler at the output stage. The output signal from the PLL is multiplied, bandpass filtered and amplified to get the desired signal at desired power level.
Keywords :
frequency multipliers; frequency synthesizers; phase locked loops; phase noise; K-band PLL; frequency doubler; frequency source; frequency synthesizer; phase noise; Frequency measurement; K-band; Phase locked loops; Synthesizers;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Applied Sciences and Technology (IBCAST), 2009 6th International Bhurban Conference on
Conference_Location :
Islamabad
Print_ISBN :
978-1-4244-8650-2
Electronic_ISBN :
978-969-8741-07-5
Type :
conf
Filename :
5596174
Link To Document :
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