DocumentCode :
528742
Title :
Efficient task scheduling algorithm for triplet architecture TriBA - a novel scalable architecture
Author :
Haroon-Ur-Rashid ; Shi Feng ; Kamran, Muhammad
Author_Institution :
Dept. of Comput. Sci. & Technol., Beijing Inst. of Technol., Beijing, China
fYear :
2009
fDate :
19-22 Jan. 2009
Firstpage :
149
Lastpage :
154
Abstract :
This paper proposes an algorithmic approach to task scheduling for new idea in high performance architectures, TriBA. TriBA is considered to be a high performance, distributed parallel computing architecture. The root of “triplet based architecture” is based on the concept that “Complex problems can be decomposed to three relatively independent sub-problems, which are data Processing, data Management and data Communication”. TriBA consists of a 2D grid of small, programmable processing units, each physically connected to its three neighbors. TriBA is a real scalable architecture, featuring fractal nature for computers. TriBA is a new solution for computer architecture, which is suitable for sophisticated embedded applications with multiple concurrent processing centers. In parallel or distributed environment an efficient assignment of tasks to the processing elements is imperative to achieve fast job turnaround time. Moreover, the sojourn time experienced by each individual job should be minimized. The arriving jobs are comprised of parallel applications, each consisting of multiple-independent tasks that must be instantaneously assigned to processor queues, as they arrive. The processors independently and concurrently service these tasks. Our algorithm approach achieves optimality in task scheduling by assigning consecutive tasks to a triplet of processors exploiting locality in tasks. The key scheduling issues is, when some queue backlogs are small, an incoming job should first spread its tasks to those lightly loaded queues in order to take advantage of the parallel processing gain. Finally, task scheduling has been analyzed as a performance metric using relation between speedup, number of processors and communication cost.
Keywords :
data communication; parallel architectures; processor scheduling; task analysis; triplet state; 2D grid; TriBA; communication cost; computer architecture; concurrent processing center; data communication; data management; data processing; distributed parallel computing architecture; multiple independent task; programmable processing unit; scalable architecture; task scheduling algorithm; triplet architecture; Computer architecture; Program processors; Multiprocessor architecture; Sierpinski gasket; Von Neumann architecture; complex embedded applications; hierarchical interconnection; mapping; parallel processing; task scheduling;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Applied Sciences and Technology (IBCAST), 2009 6th International Bhurban Conference on
Conference_Location :
Islamabad
Print_ISBN :
978-1-4244-8650-2
Electronic_ISBN :
978-969-8741-07-5
Type :
conf
Filename :
5596413
Link To Document :
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