DocumentCode :
528806
Title :
3D-NonFAR: Three-dimensional non-volatile FPGA architecture using phase change memory
Author :
Chen, Yibo ; Zhao, Jishen ; Xie, Yuan
Author_Institution :
Department of Computer Science and Engineering, The Pennsylvania State University, University Park, PA 16802
fYear :
2010
fDate :
18-20 Aug. 2010
Firstpage :
55
Lastpage :
60
Abstract :
Memories play a key role in FGPAs in the forms of both programming bits and embedded memory blocks. FPGAs using non-volatile memories have been the focus of attention with zero boot-up delay, real-time reconfigurability, and superior energy efficiency. This paper presents a novel three-dimensional (3D) non-volatile FPGA architecture (3D-Non-FAR) using phase change memory (PCM) and 3D die stacking techniques. Basic structures in a conventional FPGA architecture are renovated with PCM, and components are repartitioned and reorganized in 3D-NonFAR to allow an efficient 3D integration of PCM elements. 3D-NonFAR not only preserves the advantages of existing non-volatile FP-GAs, but also provides high integration density, high performance, and bit-level programmability, which enable PCM as a universal memory replacement in FPGAs. Evaluation results show that 3D-NonFAR has smaller footprint, higher performance, and lower power consumption compared with other FPGA counterparts.
Keywords :
Delay; Field programmable gate arrays; Phase change materials; Random access memory; Stacking; Three dimensional displays; Wire; 3D IC; Non-Volatile FPGA; Phase-Change Memory;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Low-Power Electronics and Design (ISLPED), 2010 ACM/IEEE International Symposium on
Conference_Location :
Austin, TX, USA
Print_ISBN :
978-1-4244-8588-8
Type :
conf
Filename :
5599028
Link To Document :
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