DocumentCode
528847
Title
Workload-aware neuromorphic design of low-power supply voltage controller
Author
Sinha, Saurabh ; Suh, Jounghyuk ; Bakkaloglu, Bertan ; Cao, Yu
Author_Institution
School of ECEE, Arizona State University, Tempe, AZ
fYear
2010
fDate
18-20 Aug. 2010
Firstpage
241
Lastpage
246
Abstract
A workload-aware low-power neuromorphic controller for dynamic voltage scaling in VLSI systems is presented. The neuromorphic controller predicts future workload values and preemptively regulates supply voltage based on past workload profile. Our specific contributions include: (1) implementation of a digital and analog version of the controller in 45nm CMOS technology, resulting in 3% performance hit with a power overhead in the range of 10–150 microwatts, (2) higher prediction accuracy compared to a software based OS-governed DVS scheme by 50%, reducing wasted power and improving error margins, (3) digital design has minimal power overhead and is more reconfigurable, while analog design is better suited for nonlinear and complex computational tasks.
Keywords
Biomembranes; Computer architecture; Neuromorphics; Neurons; Radiation detectors; Training; Voltage control; DVS; Neuromorphic engineering; spiking neurons;
fLanguage
English
Publisher
ieee
Conference_Titel
Low-Power Electronics and Design (ISLPED), 2010 ACM/IEEE International Symposium on
Conference_Location
Austin, TX, USA
Print_ISBN
978-1-4244-8588-8
Type
conf
Filename
5599070
Link To Document