Title :
Design a low-noise operational amplifier with constant-gm
Author :
Lai, Jui-Lin ; Lin, Ting-You ; Tai, Cheng-Fang ; Lai, Yi-Te ; Chen, Rong-Jian
Author_Institution :
Dept. of Electron. Eng., Nat. United Univ., Miaoli, Taiwan
Abstract :
In the paper, the folded-cascode operational amplifier with constant-gm is proposed and analyzed. The proposed low-noise operational amplifier (LNA) can be expanded the ratio of W/L in the differential pair transistor by the channel-length split method that the performance of amplifier for the product of gain and bandwidth, noise and offset voltage to improved The area of the transistor (W, L) can be properly increased to effectively decrease the flick noise. The channel-length split method is separated differential input transistor into 2 transistors in series. The double indirect-frequency compensation technique and the clamping circuit are adopted to increase the bandwidth. The proposed differential pair can be provided a constant transconductance value during in the ranges for the operating region, where the values of gmI, gmII and gmIII are equal to 2√βI. The floating-point structure is used to reach rail-to-rail amplification at output stage. We can show that the performance of the two sets input differential pairs in the amplifier has a rail-to-rail and constant-gm for the input signal. The property of LNA is successfully verified by the TSMC 0.35um 2P4M CMOS technology. The simulation results show that the amplifier has been improved for a high-gain (98.8dB), constant-gm in input stag, low-noise (24.92n v/√(Hz)), low offset-voltage (25.78uv), power supply rejection ratio (PSRR, 114.8 dB), CMRR (137.8 dB) and input common mode range (ICMR). There have a great potential in the VLSI implementation. The proposed LNA with high stability, high gain, and wide-swing is used in the portable electronic and bio-medicine product applications.
Keywords :
CMOS analogue integrated circuits; VLSI; differential amplifiers; flicker noise; integrated circuit design; low noise amplifiers; operational amplifiers; 2P4M CMOS technology; TSMC; VLSI implementation; channel-length split method; clamping circuit; constant transconductance; constant-gm; differential pair transistor; double indirect-frequency compensation technique; flicker noise; floating-point structure; folded-cascode operational amplifier; input common mode range; low-noise operational amplifier; power supply rejection ratio; rail-to-rail amplification; CMOS integrated circuits; CMOS technology; Capacitance; Noise; Operational amplifiers; Rail to rail amplifiers; Transistors; LNA; channel-length split; constant-gm; folded-cascode;
Conference_Titel :
SICE Annual Conference 2010, Proceedings of
Conference_Location :
Taipei
Print_ISBN :
978-1-4244-7642-8