Title :
CDM simulation study of a system-in-package
Author :
Shukla, Vrashank ; Rosenbaum, Elyse
Author_Institution :
Dept. of Electr. & Comput. Eng., Univ. of Illinois at Urbana-Champaign, Urbana, IL, USA
Abstract :
This work presents a CDM circuit-level model for stacked die in a BGA package. Circuit simulation is used to investigate the voltage stress on the die-to-die interface circuits. The power net connections are found to impact the CDM reliability. An ESD protection scheme for the die-to-die interface circuits is proposed.
Keywords :
ball grid arrays; electrostatic discharge; integrated circuit modelling; integrated circuit reliability; system-in-package; BGA package; CDM circuit-level model; CDM reliability; CDM simulation study; ESD protection scheme; charged device model; circuit simulation; die-to-die interface circuits; power net connections; stacked die; system-in-package; voltage stress; Capacitance; Driver circuits; Integrated circuit modeling; Logic gates; MOS devices; Receivers; Stress;
Conference_Titel :
Electrical Overstress/ Electrostatic Discharge Symposium (EOS/ESD), 2010 32nd
Conference_Location :
Reno, NV
Print_ISBN :
978-1-58537-182-2
Electronic_ISBN :
978-1-58537-182-2
