DocumentCode :
533348
Title :
An automated ESD verification tool for analog design
Author :
Kunz, Hans ; Boselli, Gianluca ; Brodsky, Jonathan ; Hambardzumyan, Minas ; Eatmon, Ryan
Author_Institution :
Analog Technol. Dev. ESD Lab., Texas Instrum. Inc., Dallas, TX, USA
fYear :
2010
fDate :
3-8 Oct. 2010
Firstpage :
1
Lastpage :
8
Abstract :
There is an increasing need for automated ESD verification tools-especially for analog designs. This work will describe the aspects of analog design that increase verification complexity and will present tool requirements based on these aspects. A new verification tool for analog design will then be presented.
Keywords :
analogue circuits; circuit complexity; electrostatic discharge; analog design; automated ESD verification tool; verification complexity; Availability; Complexity theory; Computational modeling; Electrostatic discharge; Layout; Network topology; Topology;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electrical Overstress/ Electrostatic Discharge Symposium (EOS/ESD), 2010 32nd
Conference_Location :
Reno, NV
Print_ISBN :
978-1-58537-182-2
Electronic_ISBN :
978-1-58537-182-2
Type :
conf
Filename :
5623715
Link To Document :
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