Near-threshold adiabatic flip-flops based on PAL-2N circuits in nanometer CMOS processes

Author

Hu, Jianping ; Yu, Xiaoying

Author_Institution

Fac. of Inf. Sci. & Technol., Ningbo Univ., Ningbo, China

Volume

1

fYear

2010

fDate

1-2 Aug. 2010

Firstpage

446

Lastpage

449

Abstract

This paper presents ultra low-power adiabatic flip-flops that operate on near-threshold region. The near-threshold flip-flops are realized by PAL-2N (pass-transistor adiabatic logic with NMOS pull-down configuration) circuits. A near-threshold mode-10 counter is verified. All circuits are simulated using NCSU PDK 45 nm technology by varying supply voltage from 0.2 V to 0.9 V with 0.1 V steps. Based on the simulation results, the adiabatic flip-flops that operate on medium-voltage region can not only keep reasonable speed but also reduce greatly energy consumptions.

Keywords

CMOS logic circuits; MOSFET; flip-flops; nanoelectronics; NMOS pull-down configuration circuits; PAL-2N circuits; energy consumptions; medium-voltage region; nanometer CMOS processes; near-threshold adiabatic flip-flops; near-threshold mode-10 counter; pass-transistor adiabatic logic; size 45 nm; voltage 0.1 V; voltage 0.2 V to 0.9 V; Biological system modeling; Indexes; Integrated circuit modeling; MOS devices; Switching circuits; Adiabatic logic; Low-energy design; Mid-performance applications; Near-threshold logic;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits,Communications and System (PACCS), 2010 Second Pacific-Asia Conference on

Conference_Location

Beijing

Print_ISBN

978-1-4244-7969-6

Type

conf

DOI

10.1109/PACCS.2010.5626977

Filename

5626977