A SRAM-Based FTL Design in Solid State Drives Using Block Associative Mechanism

When Solid state drives began to enter our life and gradually became the mainstream device in the storage industry. Some issues incur the people attention in pursuit of optimal performance. This paper proposed an on-chip SRAM-based FTL design to improve the efficiency of the SSD random write and reduce the amount of erasure operations. By simulation experiments of SSDsim, we demonstrated the efficiency of our design. At the end of this paper, I gave our future directions in this work.