• DocumentCode
    534364
  • Title

    An interconnect model for storage array on Chip

  • Author

    Tianran, Wang ; Zuocheng, Xing ; Ping, Huang ; Guitao, Fu ; Anguo, Ma

  • Author_Institution
    Sch. of Comput., Nat. Univ. of Defense Technol., Changsha, China
  • Volume
    1
  • fYear
    2010
  • fDate
    18-19 Oct. 2010
  • Abstract
    In this paper, a model of transmission line based on Laplace transform is presented; this model could be computed repeatedly used by second or more-order frequency function, in which a signal of voltage difference between stimulus and response is proposed. It is possible to calculate iterative discrete convolution with computer instead of analytic continuous convolution, because the mentioned voltage signal reach to zero when the time variation reach to infinity. The model could be used in delay specificity analysis in large-scale storage array. The model is more approaching to physical analysis and HSPICE simulation results than traditional Elmore model.
  • Keywords
    Laplace transforms; SPICE; transmission lines; Elmore model; HSPICE simulation; Laplace transform; analytic continuous convolution; delay specificity analysis; interconnect model; large-scale storage array; time variation; transmission line; Wavelet analysis; Computer aided design; Delay of storage array; Interconnect model;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Information Networking and Automation (ICINA), 2010 International Conference on
  • Conference_Location
    Kunming
  • Print_ISBN
    978-1-4244-8104-0
  • Electronic_ISBN
    978-1-4244-8106-4
  • Type

    conf

  • DOI
    10.1109/ICINA.2010.5636406
  • Filename
    5636406