DocumentCode :
538082
Title :
Software and hardware in the loop component for an IEC 61850 co-simulation platform
Author :
Haffar, M. ; Thiriet, Jean Marc ; Nachar, Mohamad EI
Author_Institution :
GIPSA-Lab., Euro Syst., Grenoble, France
fYear :
2010
fDate :
18-20 Oct. 2010
Firstpage :
817
Lastpage :
823
Abstract :
The deployment of IEC61850 standard in the world of substation automation system brings to the use of specific strategies for architecture testing. To validate IEC61850 architecture, the first step consists in validating the conformity of the object modeling and services implementation inside devices. The second step consists in validating IEC61850 applications compliance according to the project specifications. A part of the architecture can of course be tested “physically”; however in the design phase or when the actual architecture cannot be checked directly, modeling is helpful. In our research study we propose a co-simulation approach based on several components allowing the realization of advanced tests. This paper describes the need and the design implementation of software and hardware in the loop components as well as the object modeling concept of lED models.
Keywords :
hardware-software codesign; software architecture; IEC 61850 co-simulation platform; architecture testing; hardware in the loop; software in the loop; substation automation system; Barium; Computer science; Hardware; IEC standards; Information technology; Software;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Computer Science and Information Technology (IMCSIT), Proceedings of the 2010 International Multiconference on
Conference_Location :
Wisla
ISSN :
2157-5525
Print_ISBN :
978-1-4244-6432-6
Type :
conf
DOI :
10.1109/IMCSIT.2010.5679954
Filename :
5679954
Link To Document :
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