DocumentCode
539008
Title
Dc-link capacitor voltage balancing for a five-level diode-clamped active power filter using redundant vectors
Author
Zhang, H.-B. ; Finney, S.J. ; Fletcher, J.E. ; Massoud, A.M. ; Yang, J. ; Williams, B.W.
Author_Institution
Dept. of Electron. & Electr. Eng., Univ. of Strathclyde, Glasgow, UK
fYear
2010
fDate
5-8 Dec. 2010
Firstpage
1
Lastpage
6
Abstract
This paper investigates the compensation and modulation processes of the five-level diode-clamped APF, compensating a three-phase rectified RL load by redundant vectors. From the analysis, a hybrid SVM algorithm allows capacitor voltage balancing. Simulation and experimental results validate the SVM algorithm.
Keywords
active filters; power capacitors; power filters; rectifying circuits; DC-link capacitor voltage balancing; five-level diode-clamped APF; five-level diode-clamped active power filter; hybrid SVM algorithm; modulation process; redundant vectors; three-phase rectified RL load compensation; Active filters; Capacitors; Inverters; Load modeling; Modulation; Semiconductor diodes; Support vector machines; SVM; capacitor voltage balancing; five-level diode-clamped active power filter;
fLanguage
English
Publisher
ieee
Conference_Titel
Universities Power Engineering Conference (AUPEC), 2010 20th Australasian
Conference_Location
Christchurch
Print_ISBN
978-1-4244-8379-2
Electronic_ISBN
978-1-4244-8380-8
Type
conf
Filename
5710765
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