Title :
LOG data analysis and application for exposure tool
Author :
Ibe, Yukio ; Takahashi, Ichiro ; Ikeda, Masatoshi ; Nishimura, Hidetaka
Author_Institution :
SANYO Semiconductor Manufacturing Co., Ltd, 3000 Chiya Koh, Ojiya City, Niigata, Japan
Abstract :
Yield loss is affected by many parameters. For instance, there are process parameter shift, tool condition shift ,etc. And it is hard to analyze and find out the root cause for those low yield, because the current wafer process has a complicated portion. So engineers have to dissolve those complicated factors and devise suitable countermeasures from many appropriate engineering data. Therefore the importance of engineering data will be rises year by year. From these circumstances, the engineering data is very important, not only cutting edge technology but also old technology. Almost engineers aware this thing, although as for infrastructure of the engineering data systems, it is not enough so far. If we can make a effective system, it must bring out 100% tool performance with mass production. In this paper, we have been focusing on the photolithography relating to yield issues and device characteristics improvement. We have tried this trial with earlier versions of tools. We have made a special system, it could work very well for the yield improvement and warning about irregular tool condition.
Keywords :
Data analysis; Data mining; Leakage current; Logic gates; Resistance; Shape; Surface morphology;
Conference_Titel :
Semiconductor Manufacturing (ISSM), 2008 International Symposium on
Conference_Location :
Tokyo, Japan
Electronic_ISBN :
1523-553X