DocumentCode :
539421
Title :
Defect reduction in ArF immersion lithography, using particle trap wafers with CVD thin films
Author :
Matsui, Yoshinori ; Onoda, Naka ; Nagahara, Seiji ; Uchiyama, Takayuki
Author_Institution :
NEC Electronics Corporation, 1120 Shimokuzawa, Sagamihara, Kanagawa 229-1198, Japan
fYear :
2008
fDate :
27-29 Oct. 2008
Firstpage :
15
Lastpage :
18
Abstract :
Particle trap wafers were applied to ArF immersion lithography to reduce the immersion related defectivity. Interfacial free energy (γ) and work of adhesion (W) between particle trap wafers and particles in immersion water seems to explain the potential of trapping particles by the particle trap wafers. It was also found that the treated SiCN CVD wafer performed well as a particle trap wafer and may help defect reduction in immersion lithography.
Keywords :
Atmospheric measurements; Cleaning; Lithography; Mathematical model; Particle measurements; Resists; Water;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Semiconductor Manufacturing (ISSM), 2008 International Symposium on
Conference_Location :
Tokyo, Japan
ISSN :
1523-553X
Electronic_ISBN :
1523-553X
Type :
conf
Filename :
5714942
Link To Document :
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