Title :
Video Encoder Architecture for MPEG2 Real Time Encoding
Author :
Jyh-Shin Pan ; Geng-Lin Chen ; Jia-Lung Wang
Abstract :
A video encoder architecture for encoding digital video signals based on the MPEG2 video standard up to slice level is described. Function specific architecture is implemented to increase coding eficiency and reduce the silicon area for real time encoding. Hierarchical controlling concept is adopted and three stage pipeline encoding method is used in macroblock coding to increase the flexibility of encoding flow and reduce the design effort.
Keywords :
Computer architecture; Encoding; Motion estimation; Pipelines; Real-time systems; Streaming media; Transform coding;
Conference_Titel :
Consumer Electronics, 1996. Digest of Technical Papers., International Conference on
Print_ISBN :
0-7803-3029-3
DOI :
10.1109/ICCE.1996.517198