DocumentCode :
540299
Title :
A 24-GHz low power low noise amplifier using current reuse and body forward bias techniques in 0.18-µm CMOS technology
Author :
Kuo, Che-Chung ; Wang, Huei
Author_Institution :
Dept. of Electr. Eng., Nat. Taiwan Univ., Taipei, Taiwan
fYear :
2010
fDate :
7-10 Dec. 2010
Firstpage :
1509
Lastpage :
1512
Abstract :
In this paper, a 24-GHz low noise amplifier (LNA) with low dc power in a standard 0.18 μm CMOS technology is presented. The body forward bias and current reuse techniques are adopted in the design to reduce the dc power. This LNA has 11.5-dB small signal gain and 5.7-dB noise figure, with 3-mW dc power. To the author´s knowledge, this LNA has the lowest dc power among the reported LNAs around 24-GHz in 0.18 μm CMOS process.
Keywords :
CMOS analogue integrated circuits; MMIC power amplifiers; low noise amplifiers; low-power electronics; LNA; body forward bias techniques; current reuse techniques; frequency 24 GHz; gain 11.5 dB; low dc power; low power low noise amplifier; noise figure 5.7 dB; power 3 mW; size 0.18 mum; standard CMOS technology; CMOS integrated circuits; CMOS technology; Gain; Inductors; Low-noise amplifiers; Noise figure; Wireless communication; Low noise amplifier; current reuse;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Microwave Conference Proceedings (APMC), 2010 Asia-Pacific
Conference_Location :
Yokohama
Print_ISBN :
978-1-4244-7590-2
Electronic_ISBN :
978-1-902339-22-2
Type :
conf
Filename :
5728170
Link To Document :
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