A wafer-level-chip-size-package technique with inverted microstrip lines for mm-wave Si CMOS ICs

We present a novel wafer-level-chip-size-package (WLCSP) technique with inverted microstrip line (IMSL) for mm-wave Si-CMOS ICs. The IMSL consists of a signal transmission line formed as a part of the CMOS processing and Cu-plated ground plane, where thick low-k PBO (poly-benzoxazole) is formed between them. The chip can be flip-chip bonded onto the circuit board, and the RF performance is not affected by the conditions of the assembly. Note that the use of Si-substrates with the resistivity of 100Ωcm or more effectively reduces the transmission loss. The fabricated 1-stage amplifier using 110nm-CMOS devices exhibits a high gain of 6.5dB at 58GHz demonstrating that this technique is a viable choice for practical mm-wave applications.