Power circuit design for clean switching

Author

Bayerer, Reinhold ; Domes, Daniel

Author_Institution

Infineon Technol. AG, Warstein, Germany

fYear

2010

fDate

16-18 March 2010

Firstpage

1

Lastpage

6

Abstract

Power circuit design has a strong impact on switching characteristics of power semiconductors and current sharing of paralleled devices. Optimum circuit design, which means minimum parasitic inductance, allows improving power semiconductors towards lower losses. For paralleled devices it ensures symmetric losses and minimum deterioration of drive signals. Effective rules for circuit design lead to power module concepts and an integral solution for power circuits. The resulting switching characteristics show extremely low voltage spikes and oscillation free switching. This new concept also results is a breakthrough in EMI.

Keywords

electromagnetic interference; low-power electronics; network synthesis; power semiconductor devices; power semiconductor switches; CIPS; EMI; clean switching; drive signal minimum deterioration; integral solution; low voltage spikes; minimum parasitic inductance; optimum circuit design; oscillation free switching; paralleled devices; power circuit design; power module; power semiconductors; switching characteristics; Capacitors; Circuit synthesis; Inductance; Insulated gate bipolar transistors; Leg; Switches; Switching circuits;

fLanguage

English

Publisher

ieee

Conference_Titel

Integrated Power Electronics Systems (CIPS), 2010 6th International Conference on

Conference_Location

Nuremberg

Print_ISBN

978-1-61284-814-3

Type

conf

Filename

5730650