DocumentCode
541110
Title
Design of micro-power amplifier in neural recording application with improved noise efficiency factor
Author
Vejdani, Parisa ; Saadati, Fatemeh Sadat
Author_Institution
Sch. of Electr. & Comput. Eng., Univ. of Tehran, Tehran, Iran
fYear
2010
fDate
23-25 Nov. 2010
Firstpage
165
Lastpage
168
Abstract
In this work, a low noise low power neural signal amplifier is presented. This amplifier consists of a first-order high pass filter and an OTA. We study the effect of using n-type MOSFET and p-type MOSFET in input stage of OTA, on its overall noise. Then two circuit schematic for overall amplifier is suggested. Finally, the simulation results of suggested amplifier are presented. The gain of amplifier is 41.5 dB at frequency range between 0.08 and 28 kHz. The total input noise of this circuit is 1.6 μV and the total power consumption is 5.5 μW from 1.2 v power supply. The NEF of our design is 1.6 that much lower than similar previous works. These results are extracted with 0.13 μm CMOS technology.
Keywords
CMOS integrated circuits; high-pass filters; low noise amplifiers; low-power electronics; operational amplifiers; power amplifiers; CMOS technology; frequency 0.08 kHz to 28 kHz; gain 41.5 dB; high pass filter; low noise neural signal amplifier; micro-power amplifier; n-type MOSFET; neural recording; noise efficiency factor; operational transconductance amplifiers; p-type MOSFET; power 5.5 muW; size 0.13 mum; voltage 1.2 V; voltage 1.6 muV; 1f noise; CMOS integrated circuits; Capacitors; Differential amplifiers; Low pass filters; Transistors; CMOS; NEF; low noise; low power; neural recording amplifier;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems for Communications (ECCSC), 2010 5th European Conference on
Conference_Location
Belgrade
Print_ISBN
978-1-61284-400-8
Type
conf
Filename
5733882
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