Implementation of the interface to electronic transducer in digital substation

The application of electronic current/voltage transducers is of great significance in improving the reliability of power systems and especially protection relays. However the interface between the electronic transducers and bay devices is the focus of digital substation. In this paper, merging unit, the key element of the interface, is introduced and its function model is discussed. Considering the communication characteristic of the interface, i.e. multi-task has to be dealt with in parallel, a new FPGA-based method for realizing the interface to electronic transducers is also proposed in this paper. By using FPGA, the merging unit can receive the sampled values from several electronic transducers and check the corresponding validity simultaneously. Moreover, these sampled values can be ordered correctly via FPGA FIFO before they are transmitted. The suggested method has practical values for promoting the application of electronic transducers into the digital substation.