DocumentCode :
541820
Title :
Information security: The SCAN — Secure processor with crypto-biometrics capabilities
Author :
Bourbakis, Nikolaos
Author_Institution :
Wright State Univ., Dayton, OH, USA
fYear :
2010
fDate :
26-28 July 2010
Abstract :
Secure computing is gaining importance in recent times as computing capability is increasingly becoming distributed and information is everywhere. Prevention of piracy and digital rights management has become very important. Information security is mandatory rather than an additional feature. Numerous software techniques have been proposed to provide certain level of copyright and intellectual property protection. Techniques like obfuscation attempts to transform the code into a form that is harder to reverse engineer. Tamper-proofing causes a program to malfunction when it detects that it has been modified. Software watermarking embeds copyright notice in the software code to allow the owners of the software to assert their intellectual property rights. The software techniques discourage software theft, can trace piracy, prove ownership, but cannot prevent copying itself. Thus, software based security firewalls and encryption is not completely safe from determined hackers. This necessitates the need for information security at the hardware level, where secure processors assume importance. In this talk the SCAN-Secure Processor is presented as a possible solution to these important issues mentioned above. The SCAN-SP is a modified Sparc V8 processor architecture with a new instruction set to handle image compression, encryption, information hiding and biometric authentication. A SCAN based methodology for encryption and decryption of 32 bit instructions and data and a Local-Global graph based methodology for biometric authentication is presented. The modules to support the new instructions are synthesized in reconfigurable logic and the results of FPGA synthesis are presented. The ultimate goal of the presented work is the tradeoffs that exists between speed of execution and security of the processor. Designing a faster processor is not the goal of the presented work, rather exploring the architecture to provide security is of prime importance.
Keywords :
authorisation; biometrics (access control); computer crime; copyright; cryptography; digital rights management; image coding; watermarking; FPGA synthesis; SCAN-secure processor; Sparc V8 processor architecture; biometric authentication; copyright; crypto-biometrics; digital rights management; encryption; hacker; image compression; information hiding; information security; intellectual property protection; intellectual property rights; piracy prevention; reconfigurable logic; secure computing; software based security firewall; software code; software watermarking; tamper proofing; Artificial intelligence; Awards activities; Conferences; IEEE Computer Society; Information security; Software;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
e-Business (ICE-B), Proceedings of the 2010 International Conference on
Conference_Location :
Athens
Electronic_ISBN :
978-989-8425-17-1
Type :
conf
Filename :
5740416
Link To Document :
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