FFT coefficient memory reduction technique for OFDM applications

There is a strong need to implement long FFT´s in applications like orthogonal frequency division multiplexing (OFDM), radars and sonars etc. It is highly desirable to reduce the size and power requirements of the FFT so as to realize single chip long FFT based systems targeting portable applications. This paper presents a novel technique to reduce the coefficient memory almost by a factor of four by exploiting the relationships among the coefficient values thereby significantly reducing the area and power requirements of the hardware.