• DocumentCode
    542453
  • Title

    Automatic synthesis of Fast Fourier Transform devices

  • Author

    Melnyk, Anatoly ; Iakovlieva, Inna ; Lisovenko, Iryna

  • Author_Institution
    Dept. of Comput. Eng., Lviv Polytech. Nat. Univ., Lviv, Ukraine
  • fYear
    2011
  • fDate
    23-25 Feb. 2011
  • Firstpage
    155
  • Lastpage
    156
  • Abstract
    The design flow of Fast Fourier Transform devices development using the method of algorithmic operation devices synthesis from graphical representation of algorithms is proposed. Their automatic synthesis for various numbers of input data with different word length and their comparative evaluation are performed.
  • Keywords
    fast Fourier transforms; field programmable gate arrays; hardware description languages; integrated circuit design; logic design; FPGA; VHDL; algorithmic operation devices synthesis; design flow; fast Fourier transform devices development; graphical representation; Algorithm design and analysis; Fast Fourier transforms; IP networks; Performance evaluation; Signal processing algorithms; Software; Software algorithms; FPGA; VHDL; algorithm flow graph; of algorithm; processor FFT; structural matrix;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    CAD Systems in Microelectronics (CADSM), 2011 11th International Conference The Experience of Designing and Application of
  • Conference_Location
    Polyana-Svalyava
  • Print_ISBN
    978-1-4577-0042-2
  • Type

    conf

  • Filename
    5744412