DocumentCode
543920
Title
Incremental run-time application mapping for homogeneous NoCs with multiple voltage levels
Author
Chou, Chen-Ling ; Marculescu, Radu
Author_Institution
Dept. of Electr. & Comput. Eng., Carnegie Mellon Univ., Pittsburgh, PA, USA
fYear
2007
fDate
Sept. 30 2007-Oct. 3 2007
Firstpage
161
Lastpage
166
Abstract
In this paper, we propose an efficient technique for run-time application mapping onto Network-on-Chip (NoC) platforms with multiple voltage levels. Our technique consists of a region selection algorithm and a heuristic for run-time application mapping which minimizes the communication energy consumption, while still providing the required performance guarantees. The proposed technique allows for new applications to be easily added to the system platform with minimal inter-processor communication overhead. Moreover, our approach scales very well for large designs. Finally, the experimental results show as much as 50% communication energy savings compared to arbitrary mapping solutions.
Keywords
network-on-chip; power aware computing; communication energy consumption; homogeneous NoCs; incremental run-time application mapping; inter-processor communication; network-on-chip platforms; Algorithm design and analysis; Color; Energy consumption; Process control; Resource management; Routing; Runtime; Dynamic application mapping; Low-power; Networks-on-Chip;
fLanguage
English
Publisher
ieee
Conference_Titel
Hardware/Software Codesign and System Synthesis (CODES+ISSS), 2007 5th IEEE/ACM/IFIP International Conference on
Conference_Location
Salzburg
Print_ISBN
978-1-5959-3824-4
Type
conf
Filename
5753833
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