• DocumentCode
    54608
  • Title

    Crossbar RRAM Arrays: Selector Device Requirements During Write Operation

  • Author

    Sungho Kim ; Jiantao Zhou ; Lu, Wei D.

  • Author_Institution
    Dept. of Electr. Eng. & Comput. Sci., Univ. of Michigan, Ann Arbor, MI, USA
  • Volume
    61
  • Issue
    8
  • fYear
    2014
  • fDate
    Aug. 2014
  • Firstpage
    2820
  • Lastpage
    2826
  • Abstract
    A comprehensive analysis of write operations (SET and RESET) in a resistance-change memory (resistive random access memory) crossbar array is carried out. Three types of resistive switching memory cells-nonlinear, rectifying-SET, and rectifying-RESET-are compared with each other in terms of voltage delivery, current delivery, and power consumption. Two different write schemes, V/2 and V/3, were considered, and the V/2 write scheme is preferred due to much lower power consumption. A simple numerical method was developed that simulates entire current flows and node voltages within a crossbar array and provides a quantitative tool for the accurate analysis of crossbar arrays and guidelines for developing reliable write operation.
  • Keywords
    read-only storage; reliability; V/2 write scheme; V/3 write scheme; crossbar RRAM arrays; current delivery; resistive random access memory; resistive switching memory cells; selector device requirements; voltage delivery; write margin; write operation; write voltage window; Arrays; Junctions; Leakage currents; Power demand; Reliability; Resistance; Switches; Crossbar; resistive random access memory (RRAM); selector device; sneak path; write margin; write scheme; write scheme.;
  • fLanguage
    English
  • Journal_Title
    Electron Devices, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9383
  • Type

    jour

  • DOI
    10.1109/TED.2014.2327514
  • Filename
    6835201