Title :
Research on 2-out-of-2 multiplying 2 redundancy system used in high-speed train
Author :
Shenghua, Dai ; Yishi, Li
Author_Institution :
Electron. & Inf. Eng., Beijing Jiaotong Univ., Beijing, China
Abstract :
The development of high-speed train improves the standard of Board computer. Its Reliability is now more and more important. And Redundancy technology is a common way for this. This article will introduce a economical way to construct a redundant system based on FPGA. This redundant system is mainly 2-out-of-2 multiplying 2 redundant. It mainly consists of four modules: CPU core module, watch dog module, compare module and switch module. Then a series of rules will be set to make sure that the system can work in a higher reliability. Then we will analysis the system with RAMS theory. What´s more, A real system has been constructed based on Actel FPGA accord to this architecture. It is convenient to compare data on instruction bus, so this kind of comparison is taken in the system. Then at the end of this article, the simulated output results will be shown to you. This is a construction meaningful.
Keywords :
field programmable gate arrays; railway rolling stock; redundancy; traffic engineering computing; 2-out-of-2 multiplying 2 redundancy system; Actel FPGA; RAMS theory; board computer; field programmable gate array; high-speed train; redundancy technology; Field programmable gate arrays; Rail transportation; Redundancy; Switches; Synchronization; Watches; FPGA; IP core; high-speed train; redundant system;
Conference_Titel :
Computer Science and Automation Engineering (CSAE), 2011 IEEE International Conference on
Conference_Location :
Shanghai
Print_ISBN :
978-1-4244-8727-1
DOI :
10.1109/CSAE.2011.5952513