DocumentCode
547301
Title
A new method for improving breakdown voltage in PSOI MOSFETs using variable drift region doping concentration
Author
Mahabadi, S. E Jamali ; Orouji, Ali A. ; Moghadam, Hamid Amini ; Keshavarzi, Parviz
Author_Institution
Dept. of Electr. Eng., Semnan Univ., Semnan, Iran
Volume
3
fYear
2011
fDate
10-12 June 2011
Firstpage
57
Lastpage
60
Abstract
In this paper for the first time, a novel partial SOI LDMOS with variable drift region doping concentration (VDRDC-PSOI) has been proposed. The introduced doping regions in the partial buried oxide enhance peaks of the electric field to achieve maximum breakdown voltage. We demonstrate that the electric field is modified by producing two additional peaks of electric field. These peaks decrease the common peaks near the drain and gate junctions. Hence, a more uniform electric field is obtained. The two-dimensional numerical analysis is performed to investigate the breakdown characteristics of VDRDC-PSOI structure. 2-D numerical simulation results show that breakdown voltage (BV) for proposed structure is increased by 127% in comparison with C-PSOI structure. The PSOI devices with variable doping region concentration overcome the disadvantages of the conventional PSOI (C-PSOI) devices and are shown to keep better balance between the self-heating effects (SHE) and the breakdown voltage which can be optimized at the same time. Simulations results show that the maximum temperatures of the VDRDC-PSOI and C-PSOI structures are 441 and 500°K at VDS = 40 V. The substrate temperature and gate-source voltage are chosen 300°K and 10 V, respectively. Furthermore, the drive current is improved. The current of the VDRDC-PSOI and C-PSOI structures are 108 μA and 88 μA, respectively for a drain-source voltage VDS = 20V.
Keywords
MOSFET; doping profiles; electric breakdown; electric fields; heating; semiconductor device models; semiconductor doping; 2D numerical simulation; PSOI MOSFET; current 108 muA; current 88 muA; electric field; maximum breakdown voltage; partial SOI LDMOS; partial buried oxide enhance peak; self heating effect; temperature 300 K; temperature 500 K; two dimensional numerical analysis; variable drift region doping concentration; voltage 10 V; voltage 20 V; voltage 40 V; Analytical models; Doping; Electric fields; Heating; Silicon; Silicon on insulator technology; Substrates; Metal Oxide Semiconductor field effect transistor; Partial-silicon-on-insulator; breakdown voltage; conventional partial SOI; two dimensional (2-D) simulation;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer Science and Automation Engineering (CSAE), 2011 IEEE International Conference on
Conference_Location
Shanghai
Print_ISBN
978-1-4244-8727-1
Type
conf
DOI
10.1109/CSAE.2011.5952633
Filename
5952633
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