An iterative approach for hybria pipeline scheduling under throughput and resource constraints

Pipeline scheduling has a significant effect on the performance of digital signal processing (DSP) systems. Previous studies mainly focus on hybria pipeline scheduling with full pipelined components and do not support half pipelined components. In this article, a new approach for hybria pipeline scheduling problem is proposed, which can be applied to systems with non-pipelined, half pipelined or full pipelined components. Our approach attempts to minimize the system delay under throughput and resource constraints. Various experiments were taken on several popular DSP benchmarks. For the scheduling problem with half pipelined components, 80% of the results get a system delay within 120% of the optimal. And for the scheduling problem with full pipelined components, our method is comparable with previous approaches.